Chapter 1. INTRODUCTION - TM-11-5841-287-300008
Chapter 2. PRINCIPLES OF OPERATION
Figure 2-2. System power distribution and control block diagram.
Section II. FUNCTION OF ENCODING SUBSYSTEM
Figure 2-3. Typical data frame structure.
Figure 2-4. Encoding subsystem overall block diagram.
Overall Functional Description
Internal Clock Generator Section
Video Input Data Processing Section
Output Data Processing/Selection Final
ADAS Input Data Processing Section
Ground Speed Input Data Processing Section
Drift Angle Input Data Processing Section
Range and Range Delay Input Data Processing Section
Central Processing Unit(CPU) Section
Output Memory Section
Figure 2-10. Output memory functional block diagram.
Figure 2-11. Output format generator and receive register block diagram
Receive Register
Figure 2-12. Encoding subsystem power supply and distribution block diagram.
Section III. FUNCTION OF DATA TRANSMITTING SUBSYSTEM
Chapter 3. DIRECT SUPPORT MAINTENANCE INSTRUCTIONS
Table 3-1. Encoder and Data Link Control/Functional Test
Table 3-1. Encoder an Data Link Control Functional Test
Table 3-2. Encoder and Data Link Control Troubleshooting
Table 3-2. Encoder and Data Link Control Troubleshooting - continued - TM-11-5841-287-300033
Table 3-2. Encoder and Data Link Control Troubleshooting - continued - TM-11-5841-287-300034
Table 3-2. Encoder and Data Link Control Troubleshooting - continued - TM-11-5841-287-300035
Table 3-2. Encoder and Data Link Control Troubleshooting - continued - TM-11-5841-287-300036
Table 3-2. Encoder and Data Link Control Troubleshooting - continued - TM-11-5841-287-300037
Table 3-2. Encoder and Data Link Control Troubleshooting - continued - TM-11-5841-287-300038
Table 3-2. Encoder and Data Link Control Troubleshooting - continued - TM-11-5841-287-300039
Figure 3-2. Encoder test point locations.
Figure 3-3. Encoder waveforms.
Figure 3-4. Encoder exploded view (sheet 1 of 8).
Figure 3-4. Encoder exploded view (sheet 2 of 8).
Figure 3-4. Encoder exploded view (sheet 3 of 8).
Figure 3-4. Encoder exploded view (sheet 4 of 8).
Figure 3-4. Encoder exploded view (sheet 5 of 8).
Figure 3-4. Encoder exploded view (sheet 6 of 8).
Figure 3-4. Encoder exploded view (sheet 7 of 8).
Figure 3-4. Encoder exploded view (sheet 8 of 8).
Removal and Replacement of Circuit Cards
Removal and Replacement of Power Supply
Removal and Replacement of Connector
Removal and Replacement of Fan 2B1
Removal and Replacement of Connectors
Figure 3-5. Data link control exploded view
Repair of Electrical Filter Assembly 2FL1
Figure 3-6. Electrical Filter assembly 2FL1 parts location and schematic diagram
Figure 3-7. Power supply adjustments and test point locations.
Section V. DIRECT SUPPORT TESTING PROCEDURES
Table 3-4. Encoder Circut Cards to be Tested
Figure 3-8. Typical test setup for circuit card testing
Table 3-7. FT Channel A/D Levels
Figure 3-9. Analog-digital converter 2A2 test point locations.
Figure 3-10. Test setup for circuit card testing utilizing cable W3.
Figure 3-11. MT accumulator memory 2A5/2A6 test point locations.
Figure 3-12. Video control 2A7 test point locations.
Testing Video Multiplexer 2A9
Figure 3-13. MPU/timing 2A11 test point locations.
Testing Output Buffer 2A12
Testing Power Fault Detector 2A13 - TM-11-5841-287-300070
Testing Power Fault Detector 2A13 - TM-11-5841-287-300071
Figure 3-15. Power fault detector 2A13 waveforms
Figure 3-16. Output memory 2A14 test point locations.
Testing Video Interface 2A17
Testing Video Interface 2A17 - continued
Figure 3-17. Video Interface 2A17 test point locations
Figure 3-18. Video interface 2A17 waveforms
Figure 3-19. Data transmitting set cabling diagram.
Table 3-8. Encoder Wire List
Table 3-8. Encoder Wire List - continued
Table 3-9. Electrical Filter Assembly 2FL1 Wire List
Appendix A. REFERENCES - TM-11-5841-287-300082
Appendix B. EXPENDABLE SUPPLIES AND MATERIALS LIST - TM-11-5841-287-300083
SECTION II EXPENDABLE SUPPLIES AND MATERIALS LIST - TM-11-5841-287-300084
GLOSSARY - TM-11-5841-287-300085
GLOSSARY - continued - TM-11-5841-287-300086
GLOSSARY - continued - TM-11-5841-287-300087
INDEX - TM-11-5841-287-300088
INDEX - continued - TM-11-5841-287-300089
Figure FO-1. Color code markings for MIL-STD resistors and capacitors.
Figure FO-2. Video input data processing functional block diagram.
Figure FO-3. Central processing unit (CPU) functional block diagram (sheet 1 of 2).
Figure FO-3. Central processing unit (CPU) functional block diagram (sheet 2 of 2).
Figure FO-4. Encoder schematic diagram.
Figure FO-5. Data link control schematic diagram.
TM-11-5841-287-30 Transmitting Set Radar Data ANIAKT-18B (NSN 5841-01-070-4408) Manual
Chapter 2. PRINCIPLES OF OPERATION
Figure 2-2. System power distribution and control block diagram.
Section II. FUNCTION OF ENCODING SUBSYSTEM
Figure 2-3. Typical data frame structure.
Figure 2-4. Encoding subsystem overall block diagram.
Overall Functional Description
Internal Clock Generator Section
Video Input Data Processing Section
Output Data Processing/Selection Final
ADAS Input Data Processing Section
Ground Speed Input Data Processing Section
Drift Angle Input Data Processing Section
Range and Range Delay Input Data Processing Section
Central Processing Unit(CPU) Section
Output Memory Section
Figure 2-10. Output memory functional block diagram.
Figure 2-11. Output format generator and receive register block diagram
Receive Register
Figure 2-12. Encoding subsystem power supply and distribution block diagram.
Section III. FUNCTION OF DATA TRANSMITTING SUBSYSTEM
Chapter 3. DIRECT SUPPORT MAINTENANCE INSTRUCTIONS
Table 3-1. Encoder and Data Link Control/Functional Test
Table 3-1. Encoder an Data Link Control Functional Test
Table 3-2. Encoder and Data Link Control Troubleshooting
Table 3-2. Encoder and Data Link Control Troubleshooting - continued - TM-11-5841-287-300033
Table 3-2. Encoder and Data Link Control Troubleshooting - continued - TM-11-5841-287-300034
Table 3-2. Encoder and Data Link Control Troubleshooting - continued - TM-11-5841-287-300035
Table 3-2. Encoder and Data Link Control Troubleshooting - continued - TM-11-5841-287-300036
Table 3-2. Encoder and Data Link Control Troubleshooting - continued - TM-11-5841-287-300037
Table 3-2. Encoder and Data Link Control Troubleshooting - continued - TM-11-5841-287-300038
Table 3-2. Encoder and Data Link Control Troubleshooting - continued - TM-11-5841-287-300039
Figure 3-2. Encoder test point locations.
Figure 3-3. Encoder waveforms.
Figure 3-4. Encoder exploded view (sheet 1 of 8).
Figure 3-4. Encoder exploded view (sheet 2 of 8).
Figure 3-4. Encoder exploded view (sheet 3 of 8).
Figure 3-4. Encoder exploded view (sheet 4 of 8).
Figure 3-4. Encoder exploded view (sheet 5 of 8).
Figure 3-4. Encoder exploded view (sheet 6 of 8).
Figure 3-4. Encoder exploded view (sheet 7 of 8).
Figure 3-4. Encoder exploded view (sheet 8 of 8).
Removal and Replacement of Circuit Cards
Removal and Replacement of Power Supply
Removal and Replacement of Connector
Removal and Replacement of Fan 2B1
Removal and Replacement of Connectors
Figure 3-5. Data link control exploded view
Repair of Electrical Filter Assembly 2FL1
Figure 3-6. Electrical Filter assembly 2FL1 parts location and schematic diagram
Figure 3-7. Power supply adjustments and test point locations.
Section V. DIRECT SUPPORT TESTING PROCEDURES
Table 3-4. Encoder Circut Cards to be Tested
Figure 3-8. Typical test setup for circuit card testing
Table 3-7. FT Channel A/D Levels
Figure 3-9. Analog-digital converter 2A2 test point locations.
Figure 3-10. Test setup for circuit card testing utilizing cable W3.
Figure 3-11. MT accumulator memory 2A5/2A6 test point locations.
Figure 3-12. Video control 2A7 test point locations.
Testing Video Multiplexer 2A9
Figure 3-13. MPU/timing 2A11 test point locations.
Testing Output Buffer 2A12
Testing Power Fault Detector 2A13 - TM-11-5841-287-300070
Testing Power Fault Detector 2A13 - TM-11-5841-287-300071
Figure 3-15. Power fault detector 2A13 waveforms
Figure 3-16. Output memory 2A14 test point locations.
Testing Video Interface 2A17
Testing Video Interface 2A17 - continued
Figure 3-17. Video Interface 2A17 test point locations
Figure 3-18. Video interface 2A17 waveforms
Figure 3-19. Data transmitting set cabling diagram.
Table 3-8. Encoder Wire List
Table 3-8. Encoder Wire List - continued
Table 3-9. Electrical Filter Assembly 2FL1 Wire List
Appendix A. REFERENCES - TM-11-5841-287-300082
Appendix B. EXPENDABLE SUPPLIES AND MATERIALS LIST - TM-11-5841-287-300083
SECTION II EXPENDABLE SUPPLIES AND MATERIALS LIST - TM-11-5841-287-300084
GLOSSARY - TM-11-5841-287-300085
GLOSSARY - continued - TM-11-5841-287-300086
GLOSSARY - continued - TM-11-5841-287-300087
INDEX - TM-11-5841-287-300088
INDEX - continued - TM-11-5841-287-300089
Figure FO-1. Color code markings for MIL-STD resistors and capacitors.
Figure FO-2. Video input data processing functional block diagram.
Figure FO-3. Central processing unit (CPU) functional block diagram (sheet 1 of 2).
Figure FO-3. Central processing unit (CPU) functional block diagram (sheet 2 of 2).
Figure FO-4. Encoder schematic diagram.
Figure FO-5. Data link control schematic diagram.
TM-11-5841-287-30 Transmitting Set Radar Data ANIAKT-18B (NSN 5841-01-070-4408) Manual
