Figure FO-3. Central processing unit (CPU) functional block diagram (sheet 2 of 2).

Figure FO-3. Central processing unit (CPU) functional block diagram (sheet 1 of 2).

Figure FO-4. Encoder schematic diagram.

TM-11-5841-287-30 Transmitting Set Radar Data ANIAKT-18B (NSN 5841-01-070-4408) Manual
Page Navigation
86 5841-01-070-4408) Manual" class="tooltip">89

TM 11-5841-287-30

Figure FO-3. Central processing unit (CPU) functional block diagram (sheet 2 of 2).

Western Governors University

Privacy Statement
Press Release
Contact

Integrated Publishing, Inc. - A (SDVOSB) Service Disabled Veteran Owned Small Business